As new semiconductor technologies emerge, new standards for logic level voltage levels may also be applied. Transistor-Transistor Logic (TTL) circuits of the prior art typically use a 0-5 Volt supply voltage to generate a 0.4 to 3.4 Volt output signal. Low Voltage TTL (LVTTL) may generate a 0.4 to 2.4 Volt output signal.
Newer Complimentary Metal Oxide Semiconductor (CMOS) circuits may operate within a large range of supply voltages (e.g., as high as 15 Volts) and thus may operate with a 0-3.3 or 0-5.0 volt input or output signal. Table I illustrates examples of cutoff and threshold levels for logical high and low levels for LVTTL and CMOS circuits.
TABLE I ______________________________________ DESCRIPTION (LV)TTL Voltage CMOS Voltage ______________________________________ V.sub.IL V.sub.IL = 0.8 V V.sub.IL = 0.28 .times. Vdd V.sub.IH V.sub.IH = 2.0 V V.sub.IH = 0.8 .times. Vdd V.sub.TH V.sub.TH = 1.4 V V.sub.TH = Vdd/2 Nominal HIGH 2.4 Volts Vdd Nominal LOW 0.4 Volts 0 Volts Vdd (Nominal) 5.0 Volts 3-15 Volts ______________________________________
Note that TTL and LVTTL logic may be specified in terms of absolute voltage levels. However, in CMOS circuits, due to the variation in the available span of voltage levels, as well as the wide variety of available supply voltage levels for CMOS use (e.g., 3-15 Volts), logic levels may be characterized in terms of a fraction of supply voltage.
In many applications, supply voltage for CMOS use may be selected from 3.3 or 5.0 Volts. In the present invention, unless otherwise noted, it will be presumed that supply voltage Vdd will be 5.0 Volts for all circuits, and thus CMOS signal levels may vary between 0 and 5 Volts, while TTL signal levels may vary between 0 and 2.4 Volts. Note, that in a typical circuit with a given supply voltage (e.g., Vdd=3.3 Volts), supply voltage Vdd may be vary within a specified range (e.g., 3.0 to 3.6 Volts).
For the purposes of this application, LVTTL signals will be referred to as TTL signals for the sake of brevity. The advent of lower supply voltages has lead to an increased use of LVTTL circuitry where Transistor-Transistor Logic is to be used. Thus, the terms LVTTL and TTL have come to be used interchangeably.
In the prior art, it has been recognized that a conversion circuit or circuits may be required to convert TTL logic level signals to CMOS logic level signals (and vice versa) in a reliable manner. Newer semiconductor technologies may be driven by even lower voltage levels (e.g., 2 Volts, 1.8 Volts, or the like) in order to reduce power consumption and heat dissipation. Thus, there may be a continued need for such voltage level conversion circuits in the future as well.
In addition, other logic families having reduced-swing logic voltage levels are known in the art, including BTL, CTT, ETL, GTL, KTL, LTL, LVSC, LVTTL, and the like, as well as other known logic level families such as RTL, DCTL, DTL, HTL, ECL, I.sup.2 L, and the like. Thus, there remains a continued requirement for voltage conversion circuits to convert logical voltage levels.
In addition, a certain amount of hysteresis may be present in logic circuits. In other words, a circuit may be triggered to change state at a rising voltage level (e.g., 2.0 Volts for a TTL Low to High transition), and be triggered to change state again at a different, lowering voltage level (e.g., 0.8 Volts for a TTL High to Low transition. Thus, a certain amount of hysteresis may be present in a logic circuit, and these hysteresis values may differ for different logic families.